Systems for the Study of Programmable Logics
Order Code: 22235575.2.41
Category: General Lab Equipment I
Development system trainer, field-programmable gate array version Uses Xilinx with memory of 50KB, 200KB, and 400KB gates and clock reaching a speed of 200MHz Capable of communication with PC Xilinx development software and sample programs...
SPECIFICATION
- Development system trainer, field-programmable gate array version
- Uses Xilinx with memory of 50KB, 200KB, and 400KB
- gates and clock reaching a speed of 200MHz
- Capable of communication with PC
- Xilinx development software and sample programs
- RAM Minimum 128MB
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